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- 28 March 2008 -
U.S. Patent Assigned to
ViaForm Leveler Copper Damascene Electroplating Chemistry

Enthone, Inc., a business of Cookson Electronics, has been assigned United States Patent No. 7,316,772 for its ViaForm Leveler copper damascene electroplating chemistry.

This most recent patent complements and further strengthens prior patents granted to the ViaForm copper damascene electroplating process. (ViaForm is exclusively marketed and distributed worldwide by ATMI, Inc., Danbury, Conn.) According to Enthone, ViaForm Leveler is the semiconductor industry’s first leveler that enables standard, three-part additive damascene plating systems. The leveler substantially enhances copper planarity across the wafer surface.

“As device geometry continues to shrink, copper electroplating faces a number of new challenges, including void-free filling of extremely narrow and deep features, uniform plating on thin seed layers, and reducing plating defects,” said Huub van Dun, president, Enthone, Inc. “The continuous enhancements made to the ViaForm chemistry have enabled our customers to meet these challenges by substantially reducing surface defects while improving yields.”

Enthone and ATMI provide service and support to the world’s major semiconductor manufacturers. “Our partners rely on us to provide the enabling technology and support necessary for success,” van Dun added. “We take pride in our customer-focused relationships with the industry’s leading device manufacturers and OEMs. The assignment of this patent attests to the superiority of ViaForm versus all other copper damascene processes.”

Doug Neugold, CEO, ATMI, added: “In studying problems associated with copper electroplating, we recognized that Enthone was the right collaboration partner. ViaForm is the clear value-added solution for customers working on advanced copper materials.”

ViaForm is the industry’s most widely used copper damascene electroplating process. It is designed to master the complex process requirements through 45-nanometer interconnects. The chemistry provides exceptional copper filling performance for wafer interconnect and superior leveling power for enhanced planarity. Formulated for high-volume facilities, the process significantly reduces defects and is the proven choice for integration into chemical–mechanical planarization (CMP) processes.


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